| Candidate name | Program/Category | Research Topic | Status | First Employment/Educational Institute |
Rahul Chaurasia |
Institute Post-Doc, TRF |
SOFTDEEP: HLS based IP Protection tool for Secure Optimal Fault Tolerant Designs with Embedded Encrypted Protein signature |
Completed |
-- |
Mahendra Rathor |
Ph.D. |
Securing Hardware Accelerators using High Level Synthesis |
Awarded |
Faculty Chair, IIT BHU |
Rahul Chaurasia |
Ph.D. |
IP Core Protection and Detective Control of Data-Intensive Hardware IPs against Piracy |
Completed and Awarded |
Post-Doctoral Researcher, IIT Indore |
Dipanjan Roy |
Ph.D. |
IP core Security Aware Behavioral Synthesis Algorithms |
Awarded |
Assistant Professor, IDRBT Hyderabad |
Vipul Mishra |
Ph.D. |
Design Space Exploration Algorithms in Behavioral Synthesis |
Awarded |
Post-doc, University of Kentucky, USA |
Saumya Bhadauria |
Ph.D. |
Reliability Aware Behavioural Synthesis Algorithms |
Awarded |
Assistant Professor, IIIT Gwalior |
Deepak Kachave |
Ph.D. |
Transient Effect Aware Behavioural Synthesis Algorithms |
Awarded |
Assistant Professor, IIIT Pune |
K Bharath |
M.S. (Research) |
Encoded Encryption and Biometrics for High-Level Synthesis based Hardware Security against IP Piracy and Fraud IP Ownership |
Awarded |
Louisiana State University (LSU), USA |
Nitish Kumar |
M.Tech |
Hardware Security and Trust |
Pursuing |
IIT Indore |
Aditya Anshul |
Ph.D. |
Security aware HLS for DSP Hardware |
Pursuing |
IIT Indore |
Shubha Neema |
B.Tech |
Obfuscated digital systems |
Awarded |
Salesforce, Hyderabad |
Sri Harsha |
B.Tech |
Obfuscated digital systems |
Awarded |
Block Titans Innovations Lab |
Santosh Rathlavat |
B.Tech |
Firefly algorithm based DSE in HLS |
Awarded |
IIT Indore |
Juhi Naik |
B.Tech |
Bacterial Foraging Optimization Algorithm in High Level Synthesis |
Awarded |
Stanford University, USA |
Prakhar Sharma |
B.Tech |
Fault aware High Level Synthesis |
Awarded |
University of California, USA |
Harshit Jalan |
B.Tech |
RTL synthesis of DSP Cores |
Awarded |
Arcesium, Hyderabad |
Gargi Gupta |
B.Tech |
RTL synthesis of DSP Cores |
Awarded |
FICO, Bangalore |
Pavan Tarigopula |
B.Tech |
Bacterial Foraging Optimization Algorithm in High Level Synthesis |
Awarded |
Snapdeal, Noida |
Kaushik Barodiya |
B.Tech |
Fault aware High Level Synthesis |
Awarded |
Cadence Design Systems, Bangalore |
Ravi Bharti |
B.Tech |
FPGA Implementation |
Awarded |
Intel, Bangalore |
Deepika Atre |
Junior Research Fellow (DST sponsored project) |
Particle swarm optimization in High Level Synthesis |
Awarded |
IIT Indore |
N. Prajwal Chandra |
B.Tech |
IP Core Protection using Watermark |
Awarded |
IIT Indore |
E. Ranjith Kumar |
B.Tech |
IP Core Protection using Watermark |
Awarded |
IIT Indore |
Piyush Kalkute |
B.Tech |
IP Core Protection using Fingerprint |
Awarded |
IIT Indore |
Somesh Patil |
B.Tech |
Multi-key based Structural Obfuscation |
Awarded |
IIT Indore |
Gaurav Naukudkar |
B.Tech |
Multi-key based Structural Obfuscation |
Awarded |
IIT Indore |
Rahul Kumar |
B.Tech |
Crypto based IP core Steganography |
Awarded |
IIT Indore |
Rishabh Kumar |
B.Tech |
Novel approaches for Obfuscation |
Awarded |
IIT Indore |
Utkarsh Singh |
B.Tech |
IP Core Protection using Fingerprint |
Awarded |
IIT Indore |
Tarun Reddy |
Research Intern |
IP Core Protection using Biometrics |
Completed |
NIT Arunachal Pradesh |
Himanshu Mishra |
Research Intern |
Security CAD Tool using Facial Biometrics |
Completed |
IIT Indore |
Biplab Sahoo |
B.Tech |
CAD Tool for PSO-DSE |
Awarded |
IIT Indore |
Amanpreet Singh |
B.Tech |
CAD Tool for PSO-DSE |
Awarded |
IIT Indore |
Harith Vasudevan |
B.Tech |
Quadruple Phase Watermarking during High Level Synthesis for Securing Reusable Hardware IP Cores |
Awarded |
IIT Indore |
Pranjal Somkuwar |
B.Tech |
Quadruple Phase Watermarking during High Level Synthesis for Securing Reusable Hardware IP Cores |
Awarded |
IIT Indore |
Aishwarya Bhattacharya |
Research Intern |
Computer Architecture and Hardware Security |
Completed |
KIIT University |
Anjali Singh |
Research Intern |
Computer Architecture Design and Optimization |
Completed |
Medi-caps University |
Kashish Rathore |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Lakshya Namdev |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Aaditya Vishwakarma |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Anuj Malviya |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Vijay Bidwan |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Mukesh Sutar |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Ankita Saroj |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Himanshu Parihar |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Laxmi Patidar |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Harishankar Bairagi |
Intern |
Computer Hardware Security |
Completed |
CDGI, MP |
Chiranjeev Harshwal |
Research Intern |
Computer Architecture Design and Optimization |
Completed |
Shivajirao Kadam Institute of Technology & Management |
Omkar Mangesh Shirgaonkar |
B.Tech |
Black-HAT HLS for Trojan Detection |
Completed |
IIT Indore |
Mahajan Sakshi Rajendra |
B.Tech |
Black-HAT HLS for Trojan Detection |
Completed |
IIT Indore |
Chirag Kothari |
Research Assistant |
Secured and Optimized Hardware Accelerators Using Key-Controlled Encoded Hash Slices and Firefly Algorithm Based Design Space Exploration |
Completed |
IIT Indore |
Sumer Thakur |
Research Assistant |
Fusing IP Vendor Palmprint Biometric with Encoded Hash for Hardware IP Core Protection of Image Processing Filters |
Completed |
IIT Indore |
Abhinav Reddy |
B.Tech |
Piracy detection of Trojan secured IPs | Completed |
IIT Indore |